This invention relates to a semiconductor device with a semiconductor element formed on an insulating substrate of sapphire or the like and a method of manufacturing the same.
The semiconductor device of this kind, e.g., an n-channel MOS/SOS, is usually manufactured in the following way.
As shown in FIG. 1A, a silicon film 2 is first epitaxially grown on a sapphire substrate 1. Then, Si.sub.3 N.sub.4 and SiO.sub.2 film patterns 3 and 4 are successively formed by depositing and patterning SiO.sub.2 and Si.sub.3 N.sub.4 films. The silicon film 2 is then anisotropically etched using a KOH etchant and the Si.sub.3 N.sub.4 and SiO.sub.2 film patterns 3 and 4 as a mask (as shown in FIG. 1B). Then an oxide film 5 and an island silicon film 6 isolated by the oxide film 5 are formed through a thermal treatment at a high temperature and in an oxygen atmosphere with the Si.sub.3 N.sub.4 film pattern 3 as anti-oxidation mask (as shown in FIG. 1C).
Thereafter, the Si.sub.3 N.sub.4 and SiO.sub.2 film patterns 3 and 4 are removed, and a gate oxide film 7 contiguous with the surface of the island silicon film 6 is formed in a channel formation region thereof by ion implanting a p-type impurity, e.g., boron, and then thermally treating the system (as shown in FIG. 1D). A phosphorus-doped polycrystalline silicon film is then deposited to cover the entire surface, and then it is patterned to form a gate electrode 8 (as shown in FIG. 1E). Further, n.sup.+ -type source and drain regions 9 and 10 are formed by ion implanting arsenic with the gate electrode 8 and oxide film 5 used as mask and through subsequent activation (as shown in FIG. 1E). Subsequently, a CVD-SiO.sub.2 film 11 and a boron phosphorus silicide (BPSG) film 12 are successively deposited to cover the entire surface, the BPSG film 12 being subsequently fused to flatten the surface. Contact holes 13 are then formed to penetrate the BPSG film 12, CVD-SiO.sub.2 11 and gate oxide film 7. An aluminum film is then vacuum deposited to cover the entire surface, and then patterned to form aluminum leads 14 and 15 filling the contact holes 13 and connected to the source and drain regions 9 and 10 (as shown in FIG. 1F).
With the semiconductor device formed in this way, however, the interface region between the sapphire substrate 1 and silicon film 2 (i.e., island silicon film 6) has an imperfect crystal structure so that it is inverted to cause the commonly termed back-channel current, which flows between the source and drain regions 9 and 10. In addition, the mobility is reduced. It is thought that the imperfect crystal structure mainly results from the following three causes.
(1) Mismatch of crystal:
The (100) plane of the silicon film 2 grows on the (1102) plane of the sapphire substrate 1, and a mismatch of approximately 12.5% results from this difference in the crystal structure.
(2) Effects of the sapphire substrate:
The silicon film 2 is epitaxially grown atop the sapphire substrate 1 using silane gas (SiH.sub.4 gas), so that the following secondary reactions occur. EQU 2Si+Al.sub.2 O.sub.3 .fwdarw.Al.sub.2 O+2SiO
and EQU 2H.sub.2 +Al.sub.2 O.sub.3 .fwdarw.Al.sub.2 O+2H.sub.2 O
The main reaction is adversely affected by these secondary reactions.
(3) Stress:
The coefficient of thermal expansion of the sapphire substrate 1 is as high as approximately twice the coefficient of thermal expansion of the silicon film 2. Therefore, when the SOS wafer is quickly cooled down from a high temperature, the sapphire substrate 1 compresses, thus causing defects in the silicon film 2.
To cope with this drawback, it has been proposed to epitaxially grow a single crystal silicon film on the sapphire substrate 1 and to form an oxide film 17 in the neighborhood of the interface between the substrate 1 and silicon film, as shown in FIG. 2, by ion implanting oxygen with an acceleration voltage of 150 KeV and at a dosage of 1.2.times.10.sup.18 /cm.sup.2, for example, and then thermally treating the system at 1,150.degree. C. for 2 hours. The SOS wafer prepared in this way is used to manufacture the n-channel MOS/SOS in the manner as described above. In this case, the drain leak current can be reduced to some extent. However, Al.sub.2 O and other products of the secondary reactions noted above cannot be effectively avoided.
It has also been proposed to ion implant boron into the island silicon film for threshold control and also ion implant boron such that there is a peak in the interface between the sapphire substrate and island silicon film, thereby preventing the inversion in the neighborhood of the interface. However, there is an increasing demand to reduce the thickness of the silicon film, which poses difficulties in the control of the impurity profile between the surface of the silicon film and the interface thereof with the sapphire substrate. In addition, since the ion implantation is performed twice, defects are more liable to result.